July 17, 2024
Executive Summary
Semiconductors are the foundation for all modern-day technology. Despite the pervasiveness of semiconductors in society, the industry remains esoteric. The sector’s products, complex manufacturing methods and intricate global supply chain are out of sight for most consumers. As a result, semiconductors have historically operated in the shadows of the technology world. This changed during the COVID-19 pandemic, which wreaked havoc on the semiconductor supply chain and highlighted the strategic nature of the industry. Policymakers have since made supply chain resilience a matter of national security. These imperatives have only been heightened by the emergence of generative artificial intelligence, which is enabled by semiconductors and holds the promise to transform entire economies. Governments are attempting to reshape the global semiconductor supply chain, which has broad implications for technology companies, the economy and national security. This white paper provides a primer on the semiconductor value chain and discusses geopolitical, economic and investment implications of its evolution.
History
The first transistor was created by engineers at Bell Labs, part of AT&T, in 1947. A decade later, Jack Kilby, of Texas Instruments, realized that multiple transistors could be fabricated into an “integrated circuit” on a single block of material. Fairchild Semiconductor, founded in 1957, commercialized integrated circuits with the first meaningful customer being NASA, in its pursuit of the Apollo program. Texas Instruments subsequently saw a market for its early integrated circuits in military applications. Demand from government programs funded the semiconductor industry in its early days. It wouldn’t be long before the private sector embraced the technology, which ultimately galvanized the modern electronics industry. The invention of the integrated circuit put Silicon Valley on the map as the epicenter of the technology world, and put the United States on a trajectory to lead the industry for the next several years.
A Growth Industry
Semiconductors have historically been considered a “cyclical” industry, which is meant to describe their high sensitivity to the business cycle. However, a more appropriate categorization of the industry would be “growth-cyclical”. Despite frequent bouts of expansions and contractions, semiconductor proliferation across myriad applications has driven a compounded annual growth rate for the industry of 7.5% over the last several decades. Each successive computing era, from mainframes to personal computers, the internet and smartphones, was associated with higher levels of semiconductor investment and an exponential increase in units shipped. The next wave of growth will be driven by artificial intelligence (AI), electrification, autonomous vehicles and internet-of-things (IoT). These tailwinds are expected to double annual industry revenue to $1 trillion by the end of the decade. The Semiconductor Industry Association (SIA) estimates the industry will need to invest $3 trillion in R&D and capital expenditures globally over the next ten years in order to meet global demand for semiconductors.
Source: Entegris
With the emergence of Generative AI, chips that support AI processing are in particularly high demand today. Semiconductors have historically been the initial beneficiary of every computing cycle. Chips must be produced and deployed before developers can build software and services on top of them and ultimately create new applications.
As represented by the Philadelphia Stock Exchange Semiconductor Index, semiconductor stocks have meaningfully outperformed the S&P 500 Index over the last ten years.
Source: Bloomberg
Moore's Law
In 1965, Gordon Moore, the co-founder of Intel, forecasted that the number of transistors on a logic chip would double about every two years, the underlying principle of “Moore’s Law”. Notwithstanding that this prediction was more of an extrapolation than a law of nature, Moore’s Law survived nearly half a century. The adoption of new tools, like extreme-ultraviolet (EUV) lithography has the potential to extend the runway for transistor shrinking. However, the pace of density improvements has decelerated in recent years due to high costs and complexity as semiconductor shrink brushes up against physical limitations. Modern transistors are tens of thousands of times thinner than a strand of hair. Further progress in performance and power will require innovation around chip architectures, materials engineering (e.g., silicon carbide, gallium nitride) and advanced packaging, all of which are driving higher spending intensity on wafer fabrication equipment.
Source: Applied Materials
A Chip for Every Occasion
There are numerous types of semiconductors that perform a variety of distinct functions, but the three broadest categories of chips are logic, memory and analog. Logic and memory are digital chips, programmed to understand binary values (1 or 0). Analog chips are programmed to convert real world signals, like temperature, sound and speed, into digital data.
Logic. Logic chips serve as the “brains” of a computer by decoding instructions stored on memory devices in order to execute a task. Examples of logic chips include central processing units (CPUs), graphical processing units (GPUs), field programmable gate arrays (FPGAs) and microcontrollers (MCUs). CPUs handle the main functions of a computer, while GPUs support CPUs to perform concurrent calculations. Originally developed for rendering graphics in video games, GPUs are particularly well-suited for training artificial intelligence models due to their ability to process thousands of operations simultaneously. FPGAs are integrated circuits that can be programmed, and reprogrammed, after the manufacturing process, making them extremely adaptable. MCUs are compact integrated circuits that act as self-contained micro-computers, usually used for low-power applications.
Memory. Memory semiconductors store data. There are two primary subcategories of memory chips: DRAM (dynamic random access memory) and NAND (which technically stands for “Not AND”). DRAM is considered “volatile” working memory that is only functional when a device is turned on. When power is removed from the device, DRAM is instantly wiped out. DRAM is used as the primary memory in computers and provides the CPU quick access to data during its operations. NAND, in contrast, is non-volatile and is able to retain data even when a device is not powered (e.g., the photos on your smartphone). Memory chips are more commodity-like, meaning that prices are significantly influenced by supply and demand. Artificial intelligence is driving demand for high performance memory chips. High-bandwidth memory, which utilizes 3D stacking to lower latency and power consumption, is expected to remain in limited supply through 2025 due to elevated AI demand.
Analog. In addition to serving as an interface between electronics and real-world elements, analog technology manages the power delivery that virtually every electronic device requires to operate. The variety of chips and use cases for analog technology are so broad that Texas Instruments, the industry leader, produces over 80,000 products for over 100,000 different customers.
ASICs and SoCs. Two other widely used classes of chips are application-specific integrated chips (ASICs) and system-on-a-chip devices (SOCs). ASICs and SOCs are typically comprised of some combination of digital and analog components. In contrast to general purpose chips, ASICs are built for a specific application and often used for processing repetitive tasks. SoCs integrate multiple components of a computer system (e.g., CPU, GPU, memory) onto a single integrated circuit.
Qualcomm's AI Engine (SoC), which powers the recently announced Microsoft Copilot+ PC, consists of several processors integrated into the same die for improved performance and cost.
Source: Qualcomm
Old is New: Trailing Node Demand
Analog and microcontrollers are considered “trailing node” technology, implying these chips are not on the leading edge. Analog chips are built on process technology that is typically 45 nanometers (a measure of chip size) or greater, compared to today’s most advanced 3 nanometer nodes. However, trailing node semis are no less essential to electronic devices. In fact, applications like medical monitoring devices, factory robotics and automobiles are becoming increasingly intelligent and internet-connected, driving higher trailing node silicon content per unit. Applied Materials, a leading supplier of semiconductor manufacturing equipment, had the foresight to form a new division, called ICAPS (Internet-of-Things, Communications, Automotive, Power and Sensors), dedicated to serving this emerging demand for trailing node chips.
Supply Chain: Division of Labor and Emergence of the Foundry Model
Due to the lack of a pre-existing supply chain, most semiconductor companies born in the 1960s were vertically integrated, designing circuits, building their own manufacturing equipment and producing chips within their own fabrication plants (fabs). These vertically integrated semiconductor companies are referred to as integrated device manufacturers (IDMs). Current examples of IDMs in the U.S. include Intel (logic), Micron (memory) and Texas Instruments (analog).
Growing scale requirements and complexity drove a division of labor, and specialized players emerged along various parts of the value chain. The rise of Taiwan Semiconductor Manufacturing Corporation (TSMC), founded in 1987, marked an inflection point in the industry. As the world’s first pure play foundry, a fab dedicated to manufacturing semiconductors on behalf of chip designers, TSMC assumed the most capital-intensive facet of the value chain, allowing their customers to focus solely on chip design. Foundries created efficiencies in the supply chain. TSMC could pool demand from an array of customers to achieve economies of scale, which lowered its per unit cost and ultimately fueled a virtuous cycle as the company reinvested in advanced manufacturing techniques. Meanwhile, “fabless” chip design companies, such as NVIDIA, Advanced Micro Devices, and Qualcomm, benefited from asset light business models with low fixed costs. In more recent years, well-resourced technology companies, such as Apple, Amazon, Microsoft and Google, have taken advantage of the fabless model to build custom chips optimized to their specific use cases.
Case Study: Intel The Foundry Pivot
Robert Noyce and Gordon Moore, two of the original eight founders of Fairchild Semiconductor, started Intel in 1968 in Mountain View, California. Intel originated as an integrated device manufacturer that both designed and produced its own chips. As is common in the early days of any emerging industry, vertical integration is necessary as there is no existing supply chain to be leveraged. In the 1970s, Intel introduced the x86 architecture, an instruction set for chips that processed computing functions. x86 was adopted as the industry de facto standard in personal computers and thus began Intel’s rise to prominence. Subsequently, x86 was established as the industry standard in data centers, allowing Intel to gain market share in servers as cloud computing emerged in the 2000s. Intel’s foothold in the PC and server markets fueled a virtuous cycle: Intel’s revenue begot ever more high performant chips as the company reinvested into R&D and manufacturing.
Recent strategic and execution missteps eroded Intel’s competitive position. In an attempt to preserve x86 profits, Intel deprioritized the smartphone market when it was in its infancy and viewed as niche. Competitors filled the void with ARM-based processors, an ideal architecture for mobile devices due to lower cost and energy consumption. Many of these chips were produced by TSMC, which benefited from a virtuous cycle of its own: growing unit volumes from the mobile market allowed TSMC to reinvest in its manufacturing capabilities, including extreme ultraviolet lithography (EUV), and ultimately displace Intel as the process technology leader. TSMC’s manufacturing prowess enabled fabless x86 designers, like AMD, to become more competitive and facilitated the ascendance of graphic processing units (GPUs). As Intel fell further behind in process technology, the company was forced to outsource the production of its most advanced chips to the more capable Taiwan-based foundry.
Pat Gelsinger assumed the role of Intel CEO in 2021. Within weeks, Gelsinger had publicly announced a strategic pivot that deviated from the firm’s history as an IDM. Gelsinger aimed to create a foundry division, offering Intel’s manufacturing capabilities to fabless chip designers. If successful, this may bolster Intel’s economies of scale, allowing the company to compete more effectively at leading-edge manufacturing. There is no guarantee of success for Intel’s expansion into foundry services. The mastery of leading-edge manufacturing methods requires significant human capital which foundries like TSMC have accumulated over decades. To attract foundry customers, Intel must adopt a robust customer service model and a compelling library of intellectual property (IP). Despite the challenges of entering the foundry business, Intel does have some important distinctions. The company is including its proprietary x86 cores in its IP portfolio, allowing customers to build custom chips using x86 instead of ARM. Additionally, Intel is considered a leader in advanced packaging, which is likely to become increasingly important as chips grow in complexity. Lastly, the company is positioned as a strategic asset to the United States. Intel is the only U.S. company capable of producing leading-edge semiconductors at scale, a unique position in a geopolitical environment that is prioritizing domestic manufacturing capability. As part of the U.S. CHIPS and Science Act, the Department of Commerce has proposed up to $8.5 billion in direct funding, and more in tax credits and federal loans, to support Intel’s construction of fabs and research centers in Arizona, Ohio, New Mexico and Oregon. It will be important to monitor the progress of Intel’s strategic pivot as the company attempts to reinvent itself and its role in the value chain.
Globalization: Offshoring and Consolidation
Globalization has had the natural effect of orienting parts of the semiconductor value chain around geographies based on each region’s comparative advantage. A rich pool of human capital and vibrant capital markets have allowed the U.S. to maintain leadership in research-related industries including electronic design automation (EDA), chip design and advanced manufacturing equipment. The more capital-intensive wafer fabrication sector has migrated to lower cost jurisdictions of Asia, many of which have long subsidized their domestic semiconductor industry. Globalization led to cost efficiencies across the semiconductor supply chain, contributing to prices that are 35% to 65% lower than they would otherwise be[i]. While offshoring improved economic efficiency, the U.S. share of global chip manufacturing dropped precipitously from 57% in 1982 to just 10% today. The considerable specialization and capital requirements of the industry incentivized industry participants to pursue consolidation and economies of scale. This has resulted in high market share concentration across suppliers and geographies. The Semiconductor Industry Association (SIA) estimates that there are more than fifty examples across the supply chain where a single region holds more than 65% market share. East Asia and China account for nearly 75% of semiconductor manufacturing capacity and suppliers of key materials. At the company level, the current state of the industry could be characterized as oligopolistic, with certain companies dominating various parts of the value chain.
The semiconductor supply chain is global, highly specialized and interconnected. Bringing a chip from the design stage to volume production requires sophisticated cross-border coordination among thousands of participants.
Source: Qualcomm
An Oligopolistic Industry
A dizzying array of software, equipment and materials and chemicals are required to produce semiconductors in high volume at low defect rates. In recent decades, industry consolidation has led to a relatively concentrated supply chain. While this results in attractive competitive positions for many players in the ecosystem, it also creates conditions for potential bottlenecks. Below we detail the main components of the supply chain.
Electronic design automation (EDA). The chip production process commences with electronic design automation (EDA) software. EDA tools allow chip designers to plan complex systems and verify that the semiconductor manufacturing process will deliver the required performance. The EDA industry is dominated by Cadence Design Systems, Synopsys and Mentor Graphics (Siemens) which together comprise approximately three-fourths of the industry[ii]. The companies benefit from high switching costs as engineers have invested significant time and energy into learning the software, a competitive advantage for software companies in any vertical that have achieved de facto industry standard status. EDA vendors must also collaborate intimately with foundries to ensure new process technology is appropriately reflected in software simulations. This tight relationship serves as a barrier to entry for new entrants. The recurring revenue profile of EDA is unique and highly valued by investors in an industry that is otherwise relatively cyclical.
Semiconductor intellectual property (IP). Semiconductor IP are critical design building blocks, often closely associated with EDA. Semiconductor IP cores are pre-designed circuits that are licensed to chip designers so they can expedite their design while reducing risks of quality issues. EDA companies own the rights to vast IP libraries, but there are also a host of IP pure plays. One example is Arm Holdings (90% owned by Softbank), which licenses low-cost, energy-efficient CPU products that power 99% of the world’s premium smartphones.[iii]
Foundry. While IDMs manufacture their designs in-house, fabless companies send completed chip designs to foundries (a process called “tape out”) for production. Pure-play foundries include Taiwan Semiconductor Manufacturing Company (TSMC), GlobalFoundries (spun out of AMD in 2009) in the U.S., and Semiconductor Manufacturing International Corporation (SMIC) in China. TSMC is the global leader, producing over 60% of the world’s semiconductors and over 90% of the most advanced ones.[iv] The significant capital requirements of the foundry industry serve as a formidable barrier to entry. Building a modern foundry supporting 5 nanometer (leading-edge) chips would cost approximately $20 billion.[v] TSMC expects to spend approximately $30 billion in 2024 on capital expenditures. To put this number in perspective, TSMC’s capex budget for a single year is approximately 60% of the entire U.S. CHIPS and Science Act, which has earmarked $52 billion in subsidies and tax relief to reignite the U.S. semiconductor industry over a multiyear period. (see International Response)
Front-end manufacturing – wafer fabrication. Front-end manufacturing is the process of converting a blank silicon wafer into integrated circuits. This process is performed in fabs by IDMs or pure-play foundries. It is the most capital-intensive aspect of production, requires several hundred steps, months of production, and extreme precision. The process involves depositing thin films of materials on the wafer (deposition), covering the wafer with a light-sensitive coating (photoresist), printing a pattern on the photoresist by exposing it to ultraviolet light (lithography), removing the unwanted photoresist to reveal the desired pattern (etch), and implanting ions on the wafer to fine tune the conductive properties of the material (ion implantation). Semiconductor manufacturing equipment (SME) vendors supply dedicated tools for each stage in the process. There are high switching costs associated with these tools. The manufacturing process is finely tuned to specific machines, making it difficult for new entrants to displace existing systems in production. Each equipment company in the space has emerged as a leader of its domain due to industry consolidation. In recent years, SME companies have grown their services businesses (e.g., consulting, spare parts, software) which drives an attractive high margin, recurring revenue stream that complements their equipment sales.
ASML is the leading player in lithography with 80% market share. The company is the sole supplier, with 100% market share, of extreme ultraviolet lithography (EUV) machines, which are necessary for manufacturing the most advanced chips. The latest generation of ASML’s EUV machines weigh 165 tons and cost $380 million each. Shipping just one of these machines requires forty freight containers, three cargo planes and twenty trucks[vi]. EUV required decades of development, tens of billions of dollars in research and development, and hundreds of thousands of components from hundreds of suppliers who must meet exacting standards. As one example, ZEISS (24.9% owned by ASML), a German manufacturer of high precision mirrors that are used in EUV machines, states that “scaled up to the size of Germany, the largest unevenness [on a mirror] would be just a tenth of a millimeter. The sensors and actuators in a ZEISS projection optics work so precisely that a reflected laser beam could hit a golf ball on the moon with pinpoint accuracy.”[vii]
"The sensors and actuators in a ZEISS projection optics work so precisely that a reflected laser beam could hit a golf ball on the moon with pinpoint accuracy."
- ZEISS
Dutch company ASML is the sole manufacturer of extreme ultraviolet lithography (EUV) machines, used to print intricate layers on the most advanced chips. Shown above is ASML's next generation system, which weighs 165 tons and costs up to $380 million. ASML has been barred from exporting EUV systems to China.
Source: ASML
Applied Materials, Lam Research, KLA Corporation and Tokyo Electron (Japan) have broader product portfolios and participate in overlapping categories. However, dissecting market share into specific process steps reveals the dominance of each company in each niche. Applied Materials is the leader in deposition with ~40% market share, but within deposition the company has much more dominant position in physical vapor deposition (PVD) and epitaxy. Lam Research is the leader in material removal (etch) with over 30% share, but has a near monopoly in etch for 3D NAND. KLA Corporation is the dominant player in process control with ~60% market share, over four-times that of the nearest competitor. And Tokyo Electron maintains ~90% market share of the photoresist market, and nearly 100% share for EUV photoresist.[viii]
A finished wafer with chips etched into it.
Source: The Wall Street Journal
Back-end manufacturing – assembly, packaging & testing. The back-end process begins with a completed wafer which is probed for defects. The wafer is then sliced into individual chips which are packaged between substrates and heat spreaders for protection. Chips are then sent to assemblers, who fashion chips into integrated circuits by connecting the various components with electrical wiring that can often reach fifty miles. Back-end manufacturing is mostly performed by outsourced semiconductor assembly and test companies (OSATs) though IDMs and foundries perform certain of these functions. Advanced packaging methods will play an even larger role in driving chip performance as chips grow increasingly complex and miniaturization becomes limited by the laws of physics, and therefore, cost prohibitive. Notable architecture and packaging innovations include 3D stacking (stacking multiple chips vertically on top of one another), gate-all-around (GAA, where the control gate is placed on all four sides of the electric channel to improve performance and lower power consumption), chiplets (miniature modular circuits with distinct functions that can be mixed-and-matched with other chiplets in a single package, reducing development time and costs), and system-on-a-chip (SoC, which integrates much of a computer’s functionality in a single package).
New Entrants: Custom Chips and Startups
The foundry/fabless model has lowered the barrier to entry for new entrants in semiconductor design. This has enabled select technology companies, with significant financial resources, human capital and user bases, to build their own semiconductors optimized for specific use cases. Companies like Apple, Alphabet (Google), Amazon and Meta are just a few examples of technology companies who are developing in-house silicon. The motivations of each company are, to varying degrees, to differentiate their hardware and software products, lower costs, and untether themselves from incumbents (e.g., Intel, AMD and NVIDIA).
Apple. Apple’s custom chips are SoCs, with a combination of CPUs, GPUs and memory packaged together. Apple silicon undergirds most Apple products today to drive high performance without sacrificing battery life. (see Case Study: Apple - Differentiation by Integration) In May 2024, it was reported that Apple was designing custom server chips that would be used in its data centers and likely focused on processing AI models. It was also reported that these chips may enable “confidential computing” across Apple’s devices and its cloud infrastructure. (see The Next Frontier: Edge Computing)
Google. Google’s Tensor Processing Unit (TPU) is an ASIC developed for neural network machine learning. The chip is designed specifically for Google’s own TensorFlow software, a library of machine learning and AI tools. Google started using TPUs internally in 2015 and made them available for third-party use via its cloud offering in 2018. Google researchers originally used TPUs to create a software system called Transformers, the foundation for what ultimately became ChatGPT. In 2024, Google unveiled its Axion Arm-based data center CPU, which is well-suited for web and app servers, analytics and AI-related tasks.
Amazon. Amazon’s Graviton chip, released in 2018, is an ARM-based CPU available to Amazon Web Services customers. Amazon launched its Inferentia chips, for running pre-trained AI models (inference), in 2019, and subsequently rolled out its Trainium chips, for training AI models, in 2021.
Meta. Meta designed its first-generation Meta Training and Inference Accelerator (MTIA) ASIC in 2020. The MTIA series of chips are specifically designed for deep learning recommendation models (DLRMs), which are core to Meta’s advertising algorithms (e.g., Facebook, Instagram).
Microsoft. Microsoft is scheduled to deploy its first custom silicon to its cloud infrastructure in 2024. Microsoft has announced its Azure Maia AI chip, for running large language models (training and inference), and Cobalt, an Arm-based CPU that is designed to power general cloud services on Azure.
OpenAI. It was reported in October 2023 that OpenAI, the company behind ChatGPT, was exploring making its own AI chips. OpenAI CEO Sam Altman has complained about the scarcity and costs of GPUs for AI training, of which NVIDIA currently maintains more than 80% market share. OpenAI’s chip ambitions appear to be gaining momentum, with the company reportedly poaching engineering talent from Google’s TPU division.[ix] It has been separately reported that Altman was in talks with investors to raise between $5 and $7 trillion to increase global chip-building capacity.[x]
“The models of today cost about $100 million… I think we’re going to see models trained in the next year [cost] about $1 billion. And then 2025, 2026, we’re going to go to $5 billion or $10 billion. And I think there’s a chance it may go beyond that to $100 billion.”
– Dario Amodei, CEO, Anthropic (CNBC), April 2024
Big tech companies expect to significantly increase capital expenditures, a large portion of which will be directed at data center infrastructure, including off-the-shelf and proprietary semiconductors.
Source: Bloomberg
In addition to big tech, hundreds of startups have emerged in pursuit of the secular opportunity in semiconductors.
Cerebras. Founded in 2016 by CEO and co-founder Andrew Feldman, Cerebras takes a unique approach to chip design. Rather than connecting multiple chips together and transmitting data between them, as most AI models are processed today, Cerebras has built a giant chip that includes 900,000 AI cores and enormous amounts of memory. The connections between cores operate hundreds of times faster than external interconnects between GPUs while also reducing energy for a given level of performance. Cerebras’ CS-3 chip is the largest in the world by a factor of 50x. “Our chip is the size of a dinner plate – a GPU is the size of a postage stamp” notes Feldman.[xi]
Source: Cerebras
Groq. Groq is another popular startup whose language processing units (LPUs) are optimized for running large language models (LLMs). According to Groq, an LPU can run big LLMs ten times faster than existing systems by overcoming two common LLM bottlenecks: compute density and memory bandwidth.
SambaNova. While not selling chips individually, SambaNova offers a full-stack, enterprise-scale AI platform, comprising hardware, networking, software and foundation models, that runs on its own silicon. SambaNova’s suite helps enterprises build and deploy customized GenAI models. According to the company, it’s SN40L chip can serve a 5 trillion parameter model.
Graphcore. Graphcore’s Intelligence Processing Units (IPUs) are designed specifically for the “fine-grained parallelism” associated with AI compute.
Case Study: Apple Differentiation by Integration
Among big tech companies designing their own chips, Apple has the longest history of doing so successfully, introducing the technology to its iPad and iPhone in 2010. Apple then extended the same ARM-based architecture to its Mac line of products in 2020, displacing Intel’s x86. Apple is also developing cellular wireless chips to replace Qualcomm processors in its products, though developing an internal cellular modem has proved more challenging as the product launch continues to be delayed.
The core value proposition for Apple’s products is the seamless integration of its hardware (Mac, iPhone, iPad, etc), software (macOS, iOS) and services (App Store, Apple Music, Apple TV+). By vertically integrating deeper into the hardware stack with its own silicon, Apple can design chips to optimize overall system functionality and further differentiate its products through superior performance. For example, there is speculation that Apple’s new M4 line of processors may enable powerful AI that can be run locally on an iPhone (on the edge) rather than being remotely in a cloud data center.
"Today, your cell phone has more computer power than all of NASA back in 1969, when it placed two astronauts on the moon."
- Dr. Michio Kaku, Physics of the Future
In May 2024, it was reported that Apple is working on its own chip to run AI software in data center servers. As reported by The Information in May 2024, “Apple’s confidential computing techniques utilize the high-end custom chips it originally designed for Macs, which offer better security than competing chips made by Intel and AMD, the people said. By using its own chips, Apple controls both the hardware and software on its servers, giving it a unique advantage of being able to design more secure systems over its competitors.”
The Next Frontier: Edge Computing
Most complex computing processes, such as large language model training, are performed in vast centralized data centers, including cloud service providers such as Amazon Web Services, Microsoft Azure and Google Compute Platform. Cloud computing offers nearly unlimited data storage capacity and processing power, both of which are essential requirements for training artificial intelligence models. However, for new use cases to proliferate in areas such as autonomous driving, personal assistants, and augmented and virtual reality it will be necessary for processing to move from the cloud to the “edge”.
The edge is defined as anywhere people and things interact with the digital world (e.g., mobile phones, laptops, televisions). The concept of edge computing emerged decades ago during the advent of content delivery networks (CDNs). CDNs are geographically distributed servers, sitting between endpoint devices and origin servers, which are typically housed in a centralized data center. The value proposition of CDNs is to cache frequently requested internet content (e.g., webpages, video) on servers closer to the end user, resulting in faster response times, reduced bandwidth costs (as inbound/outbound network traffic is reduced), improved uptime and elements of security (e.g., web application firewalls). CDNs are building more computing capability into their own servers, which will allow certain endpoint devices (e.g., autonomous vehicles) to offload compute intensive tasks to the CDN while maintaining low latency.
Edge computing is advancing even further as the latest semiconductors can pack AI-grade processing power directly onto local devices. This will further improve latency and security, as sensitive data can be processed directly on the device rather than transmitted over the network and processed in the cloud.
Microsoft, as one example, recently announced its Copilot+ PCs. This line of laptops incorporates Qualcomm’s latest Snapdragon processors, which emphasize AI integration through its Neural Processing Unit (NPU). NPUs are specialized processors used for machine learning algorithms and are more power efficient than CPUs and GPUs, making them particularly well-suited for on-device processing.
In June 2024, Apple revealed “Apple Intelligence”, an AI application that leverages the company’s latest chips to perform as much on-device AI processing as possible. Apple is further embedding security into its AI tools by building its own data center chips, which will process more complex queries that can’t be executed on-device.
“Apple’s goal here is to integrate all their data and services together with AI. This means their chip needs to run the full iOS / MacOS stack. Users will have near digital twins of their operating system, applications and data on the device and in Apple’s cloud. This requires not only AI computer performance, but also all of Apple’s sauce around their CPU cores and silicon to software stack.”
– SemiAnalysis, May 2024
Supply Chain: Bottlenecks
The high concentration among certain parts of the semiconductor supply chain creates the condition for bottlenecks. These vulnerabilities were revealed during the pandemic, which placed significant stress on the semiconductor supply chain. In the early days of the pandemic, automakers canceled chip orders in response to lower end-market demand. Meanwhile, many areas of technology, experiencing a surge from work-from-home tailwinds, stepped in to fill the vacant fab capacity left by automakers. Automotive end-market demand quickly recovered, but by that time, it was too late. Fabs were operating near full capacity and automakers were forced to wait in line. For a car that requires hundreds of chips, just one missing component can delay completion of the entire vehicle.
Policymakers had the stark realization that the semiconductor industry, which underpins a vast swath of essential commercial and military products, was heavily dependent on a handful of firms and geographies. Taiwan is perhaps the most precarious chokepoint. Governed independently of China since 1949, Taiwan is still viewed by Beijing as part of its territory. Furthermore, a recent earthquake, Taiwan’s largest in twenty-five years, served as a reminder that the island-nation sits on top of several active geological fault lines. Any loss of access to Taiwan’s manufacturing capabilities due to territorial disputes or natural disasters would have broad and severe implications for the global economy.
Silicon Shield
As Chris Miller describes in his 2022 book Chip War, the originations for Taiwan’s semiconductor-oriented economy date back to the 1960s, when Texas Instruments agreed to build a fabrication plant on the island. Taiwan realized that tight economic integration with the United States would provide jobs and bolster its national security. Taiwan presumed that as an indispensable cog in the semiconductor supply chain, the U.S. would have a vested interest in its independence and an invasion of the island would be deterred. Thus, was born the concept of the “silicon shield”. Semiconductors, today, account for 13% of Taiwan’s GDP.
The regionalization of supply chains could alter the position of nations who value the strategic significance they hold within the semiconductor industry. At the urging of its customers, TSMC is in the early stages of diversifying its geographic footprint, though TSMC management has voiced skepticism over the efforts. There is some debate as to the durability of Taiwan’s “silicon shield” as manufacturing is reshored away from the island. TSMC has stated their intent to keep the most leading-edge production in Taiwan, which brings into question how truly motivated the company is to export their manufacturing expertise to other countries.
Taiwan is not the only country who views their role in the supply chain as critical to national defense. Japan, too, associates their dominance in specialty semiconductor materials as key to military alliances. “Tokyo is pumping billions of dollars into the country’s menagerie of obscure suppliers, viewing its dominance there as important to the country’s national security. Having control of an important link in the semiconductor supply chain solidifies Japan’s military ties with its main ally, the U.S., because it can contribute its technology to the alliance rather than simply relying on American hardware.” (Wall Street Journal, June 6, 2024)
Countries around the world are heavily subsidizing the buildout of domestic manufacturing to reduce reliance on these single points of failure along the supply chain. China, in particular, has been focused on building homegrown alternatives to “chokepoint technologies” for several years. As countries reduce their dependency supply chain bottlenecks, the concept of the “silicon shield” may lose relevance.
International Response
Geopolitical considerations have compelled U.S. politicians to pursue two intertwined bipartisan solutions to reshape the semiconductor landscape, an initiative that has only been heightened by the emergence of generative artificial intelligence. First, the U.S. and its allies are attempting to curtail China’s ability to acquire advanced semiconductors and develop domestic manufacturing capability. Export restrictions were enacted as early as 2019, initially targeted at Huawei, but have since broadened to include a range of equipment and semiconductors.
SMIC, alleged to have ties with China’s military, was added to the U.S.’s export blacklist in December 2020. This prevented companies from selling equipment with U.S. components to SMIC without a license. ASML is barred from shipping EUV systems into China. It is possible there will be added restrictions on the servicing of ASML tools already installed in China.[xii] Bloomberg reported that imports of lithography equipment from the Netherlands surged nearly 1,000% from a year earlier as Chinese firms raced to buy machines ahead of Dutch restrictions, enacted January 2024.
Bloomberg reported that imports of lithography equipment from the Netherlands surged nearly 1,000% from a year earlier as Chinese firms raced to buy machines ahead of Dutch restrictions, enacted January 2024.
Source: Bloomberg, China's General Administration of Customs
These restrictions will make it more difficult for China to compete with today’s state-of-the-art chips and manufacturing methods, but could have unintended consequences. Were ASML to stop servicing its equipment in China, the company would lose visibility into where and how its equipment is being used. Additionally, the lack of access to tools will motivate Beijing to accelerate the development of their local supply chain. “The more you put restrictions, the stronger you invite people to do it themselves,” noted ASML CEO Christophe Fouquet. China has been intently focused on building domestic alternatives to “chokepoint” technologies, those dominated by only a handful of firms or geographies. Among the top of the list are specialized steel alloys, certain raw materials, and semiconductor equipment. China has subsidized its semiconductor industry with hundreds of billions of dollars in grants, equity investments and low-interest loans over the last decade.[xiii] In May 2024, it was reported that China’s national semiconductor fund was raising $48 billion, its third installment, which will invest in the nation’s semiconductor supply chain.[xiv] A total of $47 billion was raised in the first two installments combined. China has ramped up its spending on chip manufacturing tools, an attempt to import equipment ahead of restrictions as well as double-down on homegrown initiatives, particularly in mature nodes which are less dependent on the most advanced equipment. China currently accounts for more than half of global manufacturing capacity additions for trailing node chips.
Despite the export restrictions, including ASML’s latest lithography machines, Huawei surprised the technology world in 2023 when it launched a smartphone running on a 7-nanometer chip produced by SMIC. This revelation has caused debate in Washington over the effectiveness of export controls. Still, SMIC’s operations remain several generations behind the manufacturing leaders. Industry experts speculate that the process SMIC utilized for this chip was far less efficient and higher cost than the processes that utilize the most advanced equipment, suggesting that SMIC’s 7-nanometer chip would be hard to manufacture in high volume .[xv]
China has retaliated against export restrictions with regulations of its own. Dubbed “Delete America”, guidelines have been issued for government agencies to replace American processors and operating systems with domestic alternatives. Memory chips from U.S.-based Micron have been banned from certain devices. State-backed corporations and agencies have been directed not to use Apple iPhones at work under the guise of safety concerns.
The second objective of the U.S., which is shared by policymakers around the world, is to promote reshoring efforts with government incentives aimed at localizing manufacturing capacity to build supply chain resilience. The U.S. CHIPS and Science Act (CHIPS Act), passed in 2022, commits over $50 billion to stimulate domestic production of chips including $39 billion that is earmarked for direct manufacturing incentives. To put these numbers in context, a single leading-edge fab can cost up to $25 billion. There are similar reshoring programs being implemented by Europe, Japan, South Korea and India, to name a few.
Construction is underway in Arizona, where TSMC is committing $65 billion to build three fabrication facilities. Volume production for the first fab is expected to begin in the first half of 2025.
Source: TSMC
Todd Fisher, Chief Investment Officer of the CHIPS Act office, expects the subsidies to have a multiplier effect in attracting capital. Of the $29.5 billion of subsidies granted to-date, the CHIPS Act office expects over $300 billion of aggregate investment associated with those projects.[xvi] It’s estimated that the U.S. share of global chip manufacturing capacity will grow from 10% today to 14% by 2032.[xvii] Even with incentives, it will be a multiyear journey for the U.S. to approach parity with the leading-edge manufacturing techniques and the human capital that TSMC has acquired over decades of research and development.
U.S. policymakers continue to tweak legislation to ensure CHIPS Act proceeds are spent wisely. A bipartisan bill introduced in June stipulates that CHIPS Act beneficiaries will be barred from purchasing chipmaking gear from Chinese companies.[xviii] Arizona Senator Mark Kelly, who is co-sponsoring the bill alongside Tennessee Senator Marsha Blackburn, said “as the United States revitalizes its domestic semiconductor manufacturing industry, we must do everything in our power to stop China and other foreign entities of concern from comprising our microchip manufacturing facilities.” CHIPS Act recipients were previously banned from expanding their capacity footprint in China.
“Microsoft is asking hundreds of employees in its China-based cloud-computing and artificial intelligence operations to consider transferring outside the country, as the American tech behemoth finds itself caught in the crosshairs of escalating U.S.-China tensions… The proposal comes as the Biden administration seeks to put tighter curbs around Beijing’s capability to develop state-of-the-art AI.”
–WSJ, May 2024
Decoupling: Costs and Hurdles
The deglobalization of the supply chain will bear incremental costs on the semiconductor ecosystem. It is estimated that self-sufficient local supply chains will add 35-65% in overall costs to the industry.[xix] There will be some degree of duplicative spending, on fabrication plants and equipment, across the value chain as redundancies are built in. Furthermore, building and operating fabs in western economies is generally higher cost than East Asia. Despite government incentives, TSMC has been burdened with higher manufacturing and labor costs as it expands its factory footprint in the U.S. The lack of necessary skilled labor has proven a particularly challenging near-term hurdle. U.S. employment in the semiconductor manufacturing industry shrank meaningfully over the last two decades as production migrated to jurisdictions with lower cost labor. The CHIPS Act office is focused on talent development across the semiconductor industry. Grant recipients are required to show workforce development plans. One recent example of a talent pipeline initiative was SK Hynix, a South Korean supplier of memory chips, who announced a partnership with Purdue University on a $3.9 billion semiconductor complex in Indiana.
U.S. semiconductor-related manufacturing employment has fallen sharply over the last two decades. Rebuilding a skilled workforce will be critical to the success of the country's reshoring efforts.
Source: The Wall Street Journal
“Workforce is one of, it not the most critical component to whether we’re actually going to be successful over the next decade because we can build a lot of fabs, but we need to have the people. And when I say people, I’m talking everything from PhD and masters in material science to lab technicians to electricians and welders, et cetera, et cetera. And that is a critical determinant, and we need to spend more time on it.”
–Todd Fisher, CIO of the CHIPS Act office, on Business Breakdowns podcast, May 2024
Dr. Morris Chang, TSMC founder, described the chip production efforts in the U.S. as an “expensive, wasteful exercise in futility”. Chang estimated that chip manufacturing would be 50% more expensive in the U.S. compared to Taiwan. Wendell Huan, TSMC’s chief financial officer, estimated the cost of building American fabs as four to five times more expensive than on the island.[xx] TSMC management may be expressing a degree of bias towards their homeland, but decoupling global trade will inevitably be less efficient in the intermediate term than what exists today. Nonetheless, policymakers are willing to sacrifice economic efficiency in order to shore up supply chain vulnerabilities.
“Decoupling would come at a big cost. One of the marvels of the chip supply chain is how lean it is. The risk is that as big powers such as America offer large subsidies to “reshore” semiconductor manufacturing, the economics will be upended.”
–The Economist, June 2024
Case Study: Texas Instruments Geopolitically Dependable Capacity
Texas Instruments is in the midst of a multiyear expansion of its internal manufacturing capacity. The leader in analog technology plans to spend approximately $5 billion per year through 2026, a substantial increase from its more typical annual capital expenditure rate of under $1 billion. By 2030, Texas Instruments intends to produce and assemble over 90% of its chips internally, with infrastructure to support annual revenue of $45 billion, up from $20 billion today. The company’s fabs under construction in the U.S. stand to benefit from the U.S. CHIPS and Science Act through both grants and tax credits. The company is not only fortifying its global geographic footprint but is advancing its manufacturing capabilities by investing in larger wafers (300-millimeters, up from 200-millimeters). Larger wafers will allow Texas Instruments to produce more chips per wafer and decrease cost per chip by nearly 40%. According to CEO Haviv Ilan at the Berstein Strategic Decisions Conference (May 2024), these meaningful investments will position Texas Instruments as a provider of “geopolitically dependable capacity at a very affordable, cost-competitive manner.”
Conclusion
The semiconductor industry is experiencing significant transformation. The previous computing era, fueled by smartphones and servers, is being superseded by a new paradigm defined by artificial intelligence, electrification and Internet-of-Things. Artificial intelligence is driving demand for higher performance chips, while the proliferation of smart, internet-connected devices is driving demand for trailing node semiconductors. Chip architectures, materials and packaging are innovating to accommodate the growing performance requirements, complexity and costs of advanced chips. Technology giants are increasingly investing in proprietary chips to differentiate their product offerings and unshackle themselves from incumbents. Startups are inventing new architectures and business models in pursuit of the large opportunity. These developments are occurring at a time when supply chains are being deglobalized. The regionalization of manufacturing will incur incremental costs to the ecosystem but will benefit those who participate in the build out of new manufacturing capacity, e.g., equipment manufacturers. Despite the significant public and private investments in the supply chain, Taiwan is likely to remain the epicenter of leading-edge manufacturing for the foreseeable future. The evolution of the global semiconductor industry is of critical consequence to investors as it will have sweeping repercussions across technology, the economy and national security.
References:
[i] Emerging Resilience in the Semiconductor Supply Chain, Semiconductor Industry Association, May 2024.
[ii] Cadence Is a Leader in EDA Duopoly, Bloomberg Intelligence, March 2024.
[iii] ARM company filings.
[iv] Onshoring Semiconductor Production: National Security Versus Economic Efficiency, Council on Foreign Relations, April 2024.
[v] Form F-1, GlobalFoundries.
[vi] ASML company filings.
[vii] EUV Lithography: A European Joint Project, ZEISS, October 2021.
[viii] Market share data gathered from company filings, Evercore ISI Research.
[ix] OpenAI Chip Team Is Now Serious, SemiAnalysis, June 2024.
[x] Sam Altman Seeks Trillions of Dollars to Reshape Business of Chips and AI, WSJ, February 2024.
[xi] Can Nvidia be dethroned? Meet the startups vying for its crown, The Economist, May 2024.
[xii] The CEO Trapped in the U.S.-China Chip Battle, WSJ, June 2024.
[xiii] Rage Against the Machines, The Economist, April 2024.
[xiv] China Raises $48 Billion for Semiconductor Fund to Bolster Chip-Making Capabilities, WSJ, May 2024.
[xv] The Goal for China’s Chip Giant: Cut Out the U.S., WSJ, June 2024.
[xvi] Todd Fisher – CHIPS Act: Securing Semiconductor Supply, Business Breakdowns Podcast, May 2024.
[xvii] Strengthening the U.S. Semiconductor Supply Chain, Semiconductor Industry Association, May 2024.
[xviii] China Gear Would Be Barred From CHIPS Act Projects Under US Bill, Bloomberg, June 2024.
[xix] Strengthening the U.S. Semiconductor Supply Chain, Semiconductor Industry Association, May 2024.
[xx] Inside the Silicon Shield, The Economist, June 2024.